Page Table Descriptor
A page table descriptor (PTD) contains the physical address of a page table and defines the format of entries in the context table, Level-1 and Level-2 page tables. The format of PTD, which has Page Table Pointer (PTP) and Entry Type (ET) parts, as follows:
Page Table Pointer (PTP) is the physical address of the base of a next level page table. The page table pointed to by a PTP must be aligned on a boundary equal to the size of the page table. The size of the three levels of page tables are as follows:
The field distinguishes a Page Table Descriptor (PTD) from a Page Table Entry (PTE). The field values and their meanings are summarized below:
A page table entry (PTE) specifies the physical address as well as the permissions of a page. The PTE format is shown below.
The higher order 24 bits of the 36-bit address are used to find the physical page number. The physical page number appears on the bits 35 through 12 of the physical bus when translation completes.
Cacheable Bit (Bit 7)
-
If this bit is one, the page is page cacheable by an instruction and/or data chache.
Modified Bit (Bit 6)
-
This bit is set to one by MMU when the page is accessed for writing.
Referenced Bit (Bit 5)
- This bit is set to one by MMU when the page is accessed.
Access Permissions (Bits 2 -4)
- These bits indicate whether access to this page is allowed for the transaction
being attempted.
Entry Type (Bits 0 - 1)
-
This field distinguishes a Page Table Descriptor (PTD) from a Page Table Entry
(PTE).
